A new test set compression scheme for circular scan
نویسندگان
چکیده
منابع مشابه
A New Test Compression Scheme
Generalized Modified Positional Syndrome (GMPS), of order p, a new compaction scheme for test output data is presented. The order p determines the alising probability and the amount of hardware overhead required to implement the scheme. GMPS of order two gives an aliasing probability about an order of magnitude lower than the best scheme reported in literature with minimal extra hardware. A har...
متن کاملSelective Scan Slice Grouping Technique for Efficient Test Data Compression
This paper presents a selective scan slice grouping technique for test data compression. In conventional selective encoding methods, the existence of a conflict bit contributes to large encoding data. However, many conflict bits are efficiently removed using the scan slice grouping technique, which leads to a dramatic improvement of encoding efficiency. Experiments performed with large ITC’99 b...
متن کاملLow-power selective pattern compression for scan-based test applications
The ever-increasing test data volume and test power consumption are the two major issues in testing of digital integrated circuits. This paper presents an efficient technique to reduce test data volume and test power simultaneously. The pre-generated test sets are divided into two groups based on the number of unspecified bits in each test set. Test compression procedure is applied only to the ...
متن کاملTwo-dimensional test data compression for scan-based deterministic BIST
In this paper a novel architecture for scan-based mixed mode BIST is presented. To reduce the storage requirements for the deterministic patterns it relies on a two-dimensional compression scheme, which combines the advantages of known vertical and horizontal compression techniques. To reduce both the number of patterns to be stored and the number of bits to be stored for each pattern, determin...
متن کاملA New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment
A new scan architecture for both low power testing and test volume compression is proposed. For low power test requirements, only a subset of scan cells is loaded with test stimulus and captured with test responses by freezing the remaining scan cells according to the distribution of unspecified bits in the test cubes. In order to optimize the proposed process, a novel graph-based heuristic is ...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: EURASIP Journal on Embedded Systems
سال: 2018
ISSN: 1687-3963
DOI: 10.1186/s13639-018-0085-2